Software Engineer II

Cadence is a leading provider of EDA and semiconductor IP. Our custom/analog tools help engineers design the transistors, standard cells, and IP blocks that make up SoCs. Our digital tools automate the design and verification of giga-scale, giga-hertz SoCs at the latest semiconductor processing nodes. Our IC packaging and PCB tools permit the design of complete boards and subsystems.

As a member of our digital implementation team, you will design and develop technology to be used in our design closure tools. As a member of the clocking and global routing R&D team, you will be working on the forefront of technology in building core engine technologies that are fundamental to Cadence’s physical synthesis offering. Your responsibilities include developing and designing cutting edge algorithms in physical design and integrating them into a flow to obtain world class results.

• Develop, maintain, enhance, and invent core algorithmic engines
• Engage directly with the placement, routing, timing and delay calculation teams to define and collaborate on next generation algorithms
• Do peer code reviews and maintain a high quality thread safe code & test base

The candidates should have strong software programming skill with C/C++ and strong expertise in at least one of the core areas of placement/routing/clocking/synthesis. Strong interest and understanding of complex software development in UNIX platform are required. Good verbal and written presentation are must. Minimum master degrees in EE or CS.